1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly relates to a semiconductor device that generates complementary output signals based on an input signal.
2. Description of Related Art
Types of signals transmitted inside a semiconductor device include single-ended signals and differential signals. The single-ended signal is a signal of a type that represents 1 bit using one signal wiring, and the single-ended signals are mostly used for control system signals such as clock signals, address signals, and command signals. On the contrary, the differential signal is a signal of a type that represents 1 bit using two (a pair of) signal wirings, and the differential signals are mostly used for data system signals such as an output of a sense amplifier.
However, the differential signals are also used in control system signals, particularly in a circuit part that requires high speed operations. For example, in a high speed DRAM (Dynamic Random Access Memory), a DLL (Delay Locked Loop) circuit that generates phase-controlled internal clock signals is used and read data is output in synchronization with the internal clock signals. The internal clock signals generated by the DLL circuit are single-ended signals; however, the internal clock signals are converted into differential signals near an output driver and the read data is output in synchronization with the differential internal clock signals. A so-called splitter circuit is used for such conversion of internal clock signals.
The splitter circuit is a circuit that splits an input signal into two signal paths and outputs an in-phase signal from one signal path and a reverse-phase signal from the other signal path. Both of the signal paths are formed of a plurality of cascade connected inverters, and the signal path that outputs an in-phase signal includes inverters of even numbered stages and the signal path that outputs a reverse-phase signal includes inverters of odd numbered stages. A strobe output buffer 51 shown in FIG. 3 of Japanese Patent Application Laid-open No. 2008-112565 can be mentioned as an example of the splitter circuit.
However, because two signal paths that form the splitter circuit respectively include inverters of different number of stages, there is a problem that the phases of the generated in-phase signal and the reverse-phase signal do not exactly match. To solve this problem, there has been proposed a method in which a capacitor or a resistor for adjustment are added in each signal path; however, even if a capacitance value and a resistance value are designed to match the phases of the in-phase signal and the reverse phase signal, in most cases, these phases do not exactly match when actually manufactured. Therefore, a trial and error approach is taken in which the capacitance value and the resistance value are changed for many times. However, whenever these values are changed, it becomes necessary to change a mask, and this leads to an increase of its designing cost.
Furthermore, even though these phases are matched according to the design, phase shifting occurs not only due to variations in a manufacturing process but also due to in a temperature change, fluctuations in a power supply voltage or the like after manufacturing.